Benchmarks

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IEEE Systems Journal (2020)

• Formal Synthesis of Non-fragile State-Feedback Digital Controllers Considering Performance Requirements for Step Response.

Journal of Control, Automation and Electrical Systems (2020)

• Formal Verification of Non-fragile Settling-Time and Overshoot Requirements for Digital State-Feedback Control Systems.

Journal of Systems and Software (JSS 2018)

• DSVerifier 2.0: A Bounded Model Checking Tool to Verify Fragility in Digital Systems with Uncertainties.

21st ACM International Conference on Hybrid Systems: Computation and Control (HSCC 2018).

• DSValidator: An Automated Counterexample Reproducibility Tool for Digital Systems

IEEE Transactions on Reliability 2018

• DSVerifier-Aided Verification Applied to Attitude Control Software in Unmanned Aerial Vehicles

32nd IEEE/ACM International Conference on Automated Software Engineering (ASE 2017)

• DSSynth: An Automated Controller Synthesis Tool for Physical Plants via MATLAB Toolbox

International Symposium on Software Testing and Analysis (ISSTA 2017)

• Verifying Digital Systems with MATLAB

IEEE Transactions on Computers

• Formal Non-Fragile Stability Verification of Digital Control Systems with Uncertainty

Design Automation for Embedded Systems – Springer

• Verification of Fixed-Point Digital Controllers Using Direct and Delta Form Realizations

IV Brazilian Symposium on Computing System Engineering (SBESC, 2014)

• Verification of Delta Form Realization in Fixed-Point Digital Controllers Using Bounded Model Checking

40th Annual Conference of the IEEE Industrial Electronics Society (IECON, 2014)

• SMT-Based Bounded Model Checking of Fixed-Point Digital Controllers

31st Brazilian Symposium on Telecommunications (SBrT, 2013)

• Verifying Fixed-Point Digital Filters using SMT-Based Bounded Model Checking